Careers - Open positions

Photeon is currently looking for staff to work on exciting new projects and has positions available.

The open positions are:

• Project Manager
• VHDL FPGA Senior Designer
• SoC/IP Verification Engineers
• System Engineer LTE Access Stratum (SE LTE AS)
• System Engineer UMTS/LTE Layer 1 (SE L1)
• Platform System Engineer (PSE DSDS)
• Software System Engineer (SSE)
• Hardware System Engineer for Digital Cellular Baseband (HSE)
• Wireless System Engineers
• Wireless LTE Sytem Engineers
• System Engineer Non Access Stratum (SE NAS)
• HSPA System Engineer (SE HSPA)
• Firmware/Software Engineer (SWE)
• System Engineer (SE)
• Software Engineer - WEB Technologies / System Back End
• Senior/Principle PMD IC Designer
• Senior Analog Designer

If you feel you have what it takes to fill these vacancies, we look forward to hearing from you!

Description/Responsibilities

• Management of Development Projects/Programs of Analog/Mixed Signal ICs for automotive applications, starting from acquisition support and project setup from project idea to GDSII hand over to foundry:
• Support of Sales in ASIC acquisitions with effort, resource requirement and project schedule estimations, support of commercial project evaluations and proposal preparations
• Support of technical feasibility analysis, IP selections and communication to foundries
• Project planning in terms of tasks, resources and budget planning
• Budget responsibility, project schedule responsibility, risk analysis and management
• Leadership and coordination of multi-sites, cross-cultural development team and supporting functions including resource coordination
• Project tracking, reporting and documentation
• Direct customer communication, central entry point for customers during development phase

Experience/Skills

• Proven experience and skills in managing IC development projects, preferably based on a project management certification
• Experience in analogue/mixed-signal IC design, requirements and methods of robust IC design and product qualification requirements and standards
• Experience in deep submicron digital back end flows
• High team leading and communicational skill paired with high organizational skills
• Customer service attitude paired with strong customer handling skills
• Target and solution orientation based on high analytical and interpersonal skills
• Excellent communication and presentation skills in German and English
• Additional experiences in are a plus:
• Knowledge of Capacitive Sensor Applications and requirements of those on analogue/mixed signal ICs and/or
• System Design of analogue/mixed signal Sensor Interface/Processor ICs 

You will be responsible for the proposal, design and development of applicable components and subsystems  through various stages of execution:

Description/Responsibilities

• Delivering designs in accordance with specifications to demanding time and cost objectives
• Developing and maintaining work plans and reporting progress as required

Experience/Skills

• Experience with VHDL design on FPGA as well as 
• Design using  Xilinx FPGA devices , in particular Virtex 4/5/6

Description/Responsibilities

You will be involved in the verification of complex IPs and SoCs through various stages of execution:

• Evaluate and deploy the evolving verification methodologies to handle increasingly complex SoC/IP designs within aggressive timelines.

• Ensure quality adherence during all stages of the project life cycle. Also carry out a thorough analysis of existing processes and recommend process improvements to achieve ‘Zero Defect’ chips

• Ability to work well as part of a team both locally, and also with remote or multi-site teams

Experience/Skills

• Expertise in functional verification and debugging of ASIC / VLSI Designs using verification language with a good exposure to EDA Verification tools. Must have several years of experience in at least one of the following verification languages/tools: Certitude, System C and Specman-e

• Self starter with several years of experience on SoC and IP verification on multimillion Gate and complex Design with multiple clocks and power domains with minimal supervision. Must have actively participated in a Complex SoC or IP Verification Team both at block level and top level.

• Knowledge on code coverage and functional coverage analysis

• Good understanding of Microprocessor, Microcontrollers, SoC architecture, bus protocols -particularly AMBA AHB and automotive protocols like LIN, CAN and Flex

• Experience in Low power verification using CPF/UPF would be a appreciated

Description/Responsibilities

You will drive system engineering aspects from product conception through various stages of execution:

• Drive LTE Access Stratum - User Plane architecture and interfaces
• Support definition of HW accelerators for LTE Access Stratum - User Plane processing
• Identify optimizations in the LTE Access Stratum - User Plane
• Evaluate impact of new 3.9G/LTE features on system, SW components and interfaces
• Support integration of new 3.9G/LTE features
• Contribute to system and chip requirements for next generation modems
• Analyze complex system issues in cooperation with Chip, Algorithm, Firmware and PS experts

Experience/Skills

• Good communication skills, Technical leadership, LTE related 3GPP standards, 3.9G/LTE modem subsystem
• LTE Access Stratum - User Plane (EPDCP, ERLC, EMAC) including interface to LTE L1/PHY and HW accelerators
• Embedded systems, C programming language, Real time operating systems
• SW development, trace and debug tools (Rational ClearCase, ARM RVDS, Lauterbach Debugger)

Description/Responsibilities

You will drive system engineering aspects from product conception through various stages of execution:

• Design and implementation of mobile receiver algorithms for the UMTS/LTE physical layer.
• Analysis of UMTS/LTE physical layer signal processing requirements, in particular for the 3GPP Rel. 8,9,10
• Performance evaluation of mobile receiver algorithms via link level simulations
• Definition of HW/SW split in product implementation, including definition of acceleration units
• DSP software implementation on embedded DSPs and vector processing architectures

Experience/Skills

• Digital Signal Processing and (embedded) DSP architectures
• Cellular/wireless systems experience: GSM, EGPRS, UMTS, HSDPA, LTE
• Programming in C/C++, Matlab, and DSP Assembly language

Description/Responsibilities

You will drive system engineering aspects, with focus on Dual Sim Dual Standby, from product conception through various stages of execution

• Coordinate customer requirements with direct interaction between multiple customers and multiple sites
• Define and align architecture internally and externally with customers for the complete system but also on detailed SW component level
• Evaluating feature and architecture impact for the entire solution, from reviewing HW to establishing SW architecture in the protocol stack, SIM driver, security system, etc.
• Having the end-to-end responsibility for the Dual-SIM / Dual-Standby feature, which includes technical guidance to the implementation team
• Align internal communication, design and implementation with customer requirement

Experience/Skills

• Solid customer communication, requirement management, use cases, technical documentation, project planning
• Solid experience in mobile phone development including final testing/stabilization
• Solid understanding of all software components inside a mobile phone including the interactions between them
• Solid understanding of debug and trace related requirements
• Preferably having designed multiple protocol stack components for use in a mobile phone
• Solid understanding of GCF specifications and other specifications related to the mobile phone area
• Solid experience in type approval process of mobile phones
• Solid experience in debugging issues across components (ranging from hardware, software, test systems, etc)

Description/Responsibilities

You will drive system engineering aspects from product conception through various stages of execution:

• Extend the existing software architecture tooling. With this tooling we can automatically access the UML model of the architecture and extract information
• for Generation of documentation
• Calculation of key performance indicators
• Validation of the architecture against the implementation
• The tool chain is implemented in Java and Scalausing the Eclipse Modeling Framework and open Architecture Ware

Experience/Skills

• Understanding of UML
• Programming in Java
• Experience with Eclipse Modeling Framework (Advantage)
• Experience with open Architecture Ware (Advantage)
• Programming in Scala (Advantage)

Description/Responsibilities

You will drive system engineering aspects from product conception through various stages of execution:

• You will be part of a concept engineering team that defines baseband chips for next generation cellular handsets (LTE, HSPA+). The tasks are in the digital baseband portion consisting of an ARM-based controller subsystem with a rich set of peripherals including chip-specific blocks for power, clock and system control.
• Definition of SoC-level HW architecture, specifically
• Definition of the top level architecture including buses
• Definition of the core subsystems integration
• Definition of SoC-level control mechanisms for power management, clock distribution and system control
• Definition of modem subsystem integration with alignment of reset, clocking and power management HW and SW concepts
• Definition of multi-core debug architecture covering all the cores embedded in various subsystems
• Definition of trace architecture incorporating trace sources in modem subsystems to the existing SoC-level tracing backbone
• Alignment of HW architecture with HW and SW design teams
• Architecture analysis and feasibility studies to verify performance and throughput requirements
• Documentation of concepts and authoring of chip-level and platform-level specifications

Experience/Skills

• System know how in cellular systems required, Experience with ARM-based embedded systems (HW and/or SW) required
• Experience in chip level concepts (clocking, low power, bus, computing performance, interrupts, DMA,...) desired
• Bring-up experience of complex communication systems and background with trace and debug tools desired
• Experience in connectivity interfaces (SD/MMC, UART, SPI, I2C, USB, ...) desired
• Experience and understanding of driver-level SW desired
• VHDL skills desired

Description/Responsibilities

we are seeking wireless systems engineers specializing in emergent technologies associated with the convergence of cellular telecommunications and data network systems. The ideal candidates will support key system level activities in the deployment of state-of-the art communication systems.

Among other system related activities the successful candidate will be involved in the:

• New HW/ SW components and interfaces definition
• Existing HW/ SW components optimizations
• Definition of new features and evaluation of system level issues when introducing changes on an existing system
• Support of integration of new features
• Analysis of complex system issues in cooperation with other experts team members

Experience/Skills

• Excellent knowledge in the area of wireless technologies: GSM/GPRS/UMTS and 3GPP specification
• University/University of applied sciences: degree in Electrical Engineering, Information Technology or Computer Sciences desired
• Good communication skills
• Technical leadership
• Experience with LTE will be considered a plus

 Languages

• English (Expert) required
• German (Basic) desired

Description/Responsibilities

we are seeking wireless systems engineers specializing in emergent technologies associated with the convergence of cellular telecommunications and data network systems. The ideal candidates will support key system level activities in the deployment of state-of-the art communication systems.

Among other system related activities the successful candidate will be involved in:

• New HW/ SW components and interfaces definition
• Existing HW/ SW components optimizations
• Definition of new features and evaluation of system level issues when introducing changes on an existing system
• Support of integration of new features
• Analysis of complex system issues in cooperation with other expert team members

Experience/Skills

• University/University of applied sciences: degree in Electrical Engineering, Information Technology or Computer Sciences desired
• Excellent knowledge in the area of wireless technologies:GSM/GPRS/UMTS and 3GPP specification
• Experience with : LTE protocol stack, LTE USIM/SIM, LTE positioning will be considered a plus
• Good communication skills
• Technical leadership

Languages

• English (Expert) required

Description/Responsibilities

You will drive system engineering aspects from product conception through various stages of execution:

• Definition of Non Access Stratum (NAS)  and Evolved Non Access Stratum (ENAS) architecture and interfaces
• Evaluate impact of new features on existing system,  SW components and interfaces and identify optimizations
• Support integration of features
• Analyze complex system issues in cooperation with experts from Access Stratum and Middleware/Applications

Experience/Skills

• University/University of applied sciences: degree in Electrical Engineering, Information Technology or Computer Sciences desired 
• Work experience at least 5 years
• Good communication skills
• Technical leadership
• Excellent knowledge in the following areas:
  • 3rd Generation Partnership Project related standards
  • Non Access Stratum (Mobility Management, Session Management) including interface to GSM/(E)GPRS/UMTS/LTE Access Stratum and Middleware/Applications
  • C and SDL programming language  
• SW development, trace and debug tools (Rational ClearCase, ARM RVDS, Lauterbach Debugger)

Languages

• English (Expert) required 
• German (Basic) desired

Description/Responsibilities

You will define and develop solutions supporting the next generation of 3G and 4G high-speed mobile technologies.

Experience/Skills

• expert in HSPA+ standard, C/C++, Receiver algorithm design & verification
• good experience  in: embedded HW/FW architectures, fixed point implementations, HW/FW verification, HSDPA testing, 3G System verification, UNIX
• some experience in MATLAB
• Other: Good team player, Good German languages skills highly appreciated

Description/Responsibilities

You will design and develop solutions supporting the next generation of 3G and 4G high-speed mobile technologies.

Experience/Skills 

• expert in: microcontroller/DSP assembler and C-Programming, System programming of embedded hard RT Systems, System programming of distributed systems,  control loops
• good experience/knowhow in: 2G and 3G, in particular calibration process, NTC based temperature measurement and compensation
• some experience/knowhow in: embedded data bases, digital signal processing algorithm design

Description/Responsibilities

You will design and develop solutions supporting the next generation of 3G and 4G high-speed mobile technologies.

Experience/Skills

• expert in: Automatic Frequency Correction algorithms, simulation environments/tools like MatLab, SystemC and/or CCSS, digital signal processing algorithm design, clock generation with and tuning of not temp. compensated crystal oscillators (XO)
• good experience in: 2G and 3G, in particular handling of DRX/DTX configurations/scenarios, system programming of embedded hard RT systems, system programming of distributed systems
• some experience in: physics of thermodynamics

Description/Responsibilities

You will develop new feature and maintain mobile interactivity products with special focus on back-end and middleware application. You will be part of an international team and involved in the full development cycle, from the definition of the use cases and the requirements, through to the development and launch of the application.

Experience/Skills

• Excellent programming skills
• Capabilities to develop complete products starting from a concept, including proper definition of the Use Cases and the requirements
• Indispensable: Java, SQL, PHP, JavaScript, XML
• Important: C, Linux Administration, MySQL, Derby, HTML
• Experience with server-side technologies including the relevant security aspects
• Nice to have: Perl, Python, TV / Teletext knowledge, embedded system experience
• Ability to work  in  high autonomy

Description

Experienced Analog Design Engineer for our fast growing optical communications PMD (Physical Medium Dependent) ICs design team for 10 Gb/s and higher speeds for telecom and datacom applications.
The successful candidate will report to the PMD design Manager.

Responsibility

High speed analog circuit design  for parallel optical interconnect PMD ICs such as Limiter Amplifiers, Trans-Impedance Amplifiers, VCSEL and Laser drivers, Mux/Demux, and AGCs for optical modulation 10Gb/s and above.
Hands-on on testing and characterizing high speed devices for optical interconnects.
Packaging, qualification support and production transfer.

Requested experience/skills

Experience with process technologies such as GaAs or SiGe HBT technologies and analog CMOS.
Demonstrate solid EDA tools experience and sound methodology in high frequency analog IC design, verification, validation and characterization.
Experience with design for manufacturability and testability.
Good understanding of semiconductor devices and microwave theory and optical communications standards and MSAs.
Embedded SW and Lab SW automation knowledge is considered a plus.

Desirable: Exposure to digital design and analog / mixed signal simulation tools CAD set up environment, skill routines, and scripts.

Electrical Engineering MS with 6 years of experience or Electrical/Optical Engineering Ph.D. with 4 years of circuits design experience.

Additional requirements include creativity in design, high level of initiative, strong communication skill, ability to work in dynamic and fast pace environment, working knowledge of industry best practice and very good communication skills.

Description/Responsibilities

You will develop critical analog IP blocks that will be embedded in Photeon designs. Be expected to be involved in all aspects of the analog design process from schematic design to validation of circuits in the lab.
Provide input to system and chip architects on technology selection, performance limits, area and power analysis for analog blocks.
Provide guidance and coaching to junior analog engineers and test engineers for testing.

Experience/Skills

10 years of analog / RF design experience In-depth implementation knowledge of various component architectures. Analog layout experience for low noise, RF circuit in mixed signal context. Knowledge of integrated circuit, device physics and advanced process technology. Exposure to digital design Analog / mixed signal simulation tools CAD set up environment, skill routines, scripts.